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ladybird/Kernel/Storage/ATA/AHCI/Controller.cpp

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Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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/*
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
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* Copyright (c) 2021-2022, Liav A. <liavalb@hotmail.co.il>
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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*
Everything: Move to SPDX license identifiers in all files. SPDX License Identifiers are a more compact / standardized way of representing file license information. See: https://spdx.dev/resources/use/#identifiers This was done with the `ambr` search and replace tool. ambr --no-parent-ignore --key-from-file --rep-from-file key.txt rep.txt *
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* SPDX-License-Identifier: BSD-2-Clause
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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*/
#include <AK/Atomic.h>
AK+Everywhere: Replace __builtin bit functions In order to reduce our reliance on __builtin_{ffs, clz, ctz, popcount}, this commit removes all calls to these functions and replaces them with the equivalent functions in AK/BuiltinWrappers.h.
2021-12-19 18:46:55 -03:00
#include <AK/BuiltinWrappers.h>
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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#include <AK/OwnPtr.h>
#include <AK/Types.h>
Kernel: Move IO delay code to x86 architecture subdirectory Many code patterns and hardware procedures rely on reliable delay in the microseconds granularity, and since they are using such delays which are valid cases, but should not rely on x86 specific code, we allow to determine in compile time the proper platform-specific code to use to invoke such delays.
2022-09-02 05:23:32 -03:00
#include <Kernel/Arch/Delay.h>
Kernel/PCI: Simplify the entire subsystem A couple of things were changed: 1. Semantic changes - PCI segments are now called PCI domains, to better match what they are really. It's also the name that Linux gave, and it seems that Wikipedia also uses this name. We also remove PCI::ChangeableAddress, because it was used in the past but now it's no longer being used. 2. There are no WindowedMMIOAccess or MMIOAccess classes anymore, as they made a bunch of unnecessary complexity. Instead, Windowed access is removed entirely (this was tested, but never was benchmarked), so we are left with IO access and memory access options. The memory access option is essentially mapping the PCI bus (from the chosen PCI domain), to virtual memory as-is. This means that unless needed, at any time, there is only one PCI bus being mapped, and this is changed if access to another PCI bus in the same PCI domain is needed. For now, we don't support mapping of different PCI buses from different PCI domains at the same time, because basically it's still a non-issue for most machines out there. 2. OOM-safety is increased, especially when constructing the Access object. It means that we pre-allocating any needed resources, and we try to find PCI domains (if requested to initialize memory access) after we attempt to construct the Access object, so it's possible to fail at this point "gracefully". 3. All PCI API functions are now separated into a different header file, which means only "clients" of the PCI subsystem API will need to include that header file. 4. Functional changes - we only allow now to enumerate the bus after a hardware scan. This means that the old method "enumerate_hardware" is removed, so, when initializing an Access object, the initializing function must call rescan on it to force it to find devices. This makes it possible to fail rescan, and also to defer it after construction from both OOM-safety terms and hotplug capabilities.
2021-09-07 06:08:38 -03:00
#include <Kernel/Bus/PCI/API.h>
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
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#include <Kernel/CommandLine.h>
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
2022-08-19 15:53:40 -03:00
#include <Kernel/Library/LockRefPtr.h>
Kernel: Rename Kernel/VM/ to Kernel/Memory/ This directory isn't just about virtual memory, it's about all kinds of memory management.
2021-08-06 05:45:34 -03:00
#include <Kernel/Memory/MemoryManager.h>
Kernel/Storage: Move AHCI and IDE code into new subdirectories We do that to increase clarity of the major and secondary components in the subsystem. To ensure it's even more understandable, we rename the files to better represent the class within them and to remove redundancy in the name. Also, some includes are removed from the general components of the ATA components' classes.
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#include <Kernel/Storage/ATA/AHCI/Controller.h>
#include <Kernel/Storage/ATA/AHCI/InterruptHandler.h>
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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namespace Kernel {
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
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UNMAP_AFTER_INIT NonnullLockRefPtr<AHCIController> AHCIController::initialize(PCI::DeviceIdentifier const& pci_device_identifier)
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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{
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
2022-08-19 15:53:40 -03:00
auto controller = adopt_lock_ref_if_nonnull(new (nothrow) AHCIController(pci_device_identifier)).release_nonnull();
Kernel: Clean up the AHCI code a bit The AHCI code is not very good at OOM conditions, so this is a first step towards OOM correctness. We should not allocate things inside C++ constructors because we can't catch OOM failures, so most allocation code inside constructors is exported to a different function. Also, don't use a HashMap for holding RefPtr of AHCIPort objects in AHCIPortHandler because this structure is not very OOM-friendly. Instead use a fixed Array of 32 RefPtrs, as at most we can have 32 AHCI ports per AHCI controller.
2022-04-01 14:49:22 -03:00
controller->initialize_hba(pci_device_identifier);
return controller;
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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}
bool AHCIController::reset()
{
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
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dmesgln("{}: AHCI controller reset", pci_address());
{
SpinlockLocker locker(m_hba_control_lock);
hba().control_regs.ghc = 1;
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller reset", pci_address());
full_memory_barrier();
size_t retry = 0;
// Note: The HBA is locked or hung if we waited more than 1 second!
while (true) {
if (retry > 1000)
return false;
if (!(hba().control_regs.ghc & 1))
break;
Kernel: Move IO delay code to x86 architecture subdirectory Many code patterns and hardware procedures rely on reliable delay in the microseconds granularity, and since they are using such delays which are valid cases, but should not rely on x86 specific code, we allow to determine in compile time the proper platform-specific code to use to invoke such delays.
2022-09-02 05:23:32 -03:00
microseconds_delay(1000);
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
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retry++;
}
// Note: Turn on AHCI HBA and Global HBA Interrupts.
full_memory_barrier();
hba().control_regs.ghc = (1 << 31) | (1 << 1);
full_memory_barrier();
}
Kernel/Storage: Add a whole bunch of AHCI debug output
2021-03-18 02:24:39 -03:00
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
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// Note: According to the AHCI spec the PI register indicates which ports are exposed by the HBA.
// It is loaded by the BIOS. It indicates which ports that the HBA supports are available for software to use.
// For example, on an HBA that supports 6 ports as indicated in CAP.NP, only ports 1 and 3 could be available,
// with ports 0, 2, 4, and 5 being unavailable.
// Which means that even without clearing the AHCI ports array, we are never able to encounter
// a case that we would have stale left-over ports in there. We still clear the array
// for the sake of clarity and completeness, as it doesn't harm anything anyway.
m_ports.fill({});
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
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auto implemented_ports = AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi));
for (auto index : implemented_ports.to_vector()) {
auto port = AHCIPort::create(*this, m_hba_capabilities, static_cast<volatile AHCI::PortRegisters&>(hba().port_regs[index]), index).release_value_but_fixme_should_propagate_errors();
m_ports[index] = port;
port->reset();
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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}
return true;
}
bool AHCIController::shutdown()
{
TODO();
}
size_t AHCIController::devices_count() const
{
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
2022-04-14 16:47:17 -03:00
SpinlockLocker locker(m_hba_control_lock);
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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size_t count = 0;
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
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for (auto port : m_ports) {
if (port && port->connected_device())
count++;
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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}
return count;
}
Everywhere: Run clang-format
2022-04-01 14:58:27 -03:00
void AHCIController::start_request(ATADevice const& device, AsyncBlockDeviceRequest& request)
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
{
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
auto port = m_ports[device.ata_address().port];
Kernel/Storage: Unify all ATA devices There's basically no real difference in software between a SATA harddisk and IDE harddisk. The difference in the implementation is for the host bus adapter protocol and registers layout. Therefore, there's no point in putting a distinction in software to these devices. This change also greatly simplifies and removes stale APIs and removes unnecessary parameters in constructor calls, which tighten things further everywhere.
2021-08-27 11:13:03 -03:00
VERIFY(port);
port->start_request(request);
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
}
void AHCIController::complete_current_request(AsyncDeviceRequest::RequestResult)
{
VERIFY_NOT_REACHED();
}
volatile AHCI::PortRegisters& AHCIController::port(size_t port_number) const
{
VERIFY(port_number < (size_t)AHCI::Limits::MaxPorts);
return static_cast<volatile AHCI::PortRegisters&>(hba().port_regs[port_number]);
}
volatile AHCI::HBA& AHCIController::hba() const
{
return static_cast<volatile AHCI::HBA&>(*(volatile AHCI::HBA*)(m_hba_region->vaddr().as_ptr()));
}
Kernel/AHCI: Don't use UNMAP_AFTER_INIT in header files Instead, declare such methods and functions in the code itself.
2022-04-01 14:52:37 -03:00
UNMAP_AFTER_INIT AHCIController::AHCIController(PCI::DeviceIdentifier const& pci_device_identifier)
Kernel/Storage: Unify all ATA devices There's basically no real difference in software between a SATA harddisk and IDE harddisk. The difference in the implementation is for the host bus adapter protocol and registers layout. Therefore, there's no point in putting a distinction in software to these devices. This change also greatly simplifies and removes stale APIs and removes unnecessary parameters in constructor calls, which tighten things further everywhere.
2021-08-27 11:13:03 -03:00
: ATAController()
Kernel/PCI: Cache interrupt line and interrupt pin of a device This allows us to remove the PCI::get_interrupt_line API function. As a result, this removes a bunch of not so great patterns that we used to cache PCI interrupt line in many IRQHandler derived classes instead of just using interrupt_number method of IRQHandler class.
2021-09-23 04:50:45 -03:00
, PCI::Device(pci_device_identifier.address())
Kernel/Storage: Rename the method hba_region => default_hba_region Also, make sure we unmap it after the init process.
2021-05-28 18:50:56 -03:00
, m_hba_region(default_hba_region())
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
, m_hba_capabilities(capabilities())
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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{
}
AHCI::HBADefinedCapabilities AHCIController::capabilities() const
{
u32 capabilities = hba().control_regs.cap;
Kernel/Storage: Add AHCI Extended HBA Capabilities
2021-03-17 22:03:09 -03:00
u32 extended_capabilities = hba().control_regs.cap2;
Kernel/Storage: Add a whole bunch of AHCI debug output
2021-03-18 02:24:39 -03:00
Everywhere: Prefer using {:#x} over 0x{:x} We have a dedicated format specifier which adds the "0x" prefix, so let's use that instead of adding it manually.
2021-07-21 20:30:24 -03:00
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller Capabilities = {:#08x}, Extended Capabilities = {:#08x}", pci_address(), capabilities, extended_capabilities);
Kernel/Storage: Add a whole bunch of AHCI debug output
2021-03-18 02:24:39 -03:00
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
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return (AHCI::HBADefinedCapabilities) {
(capabilities & 0b11111) + 1,
((capabilities >> 8) & 0b11111) + 1,
(u8)((capabilities >> 20) & 0b1111),
Kernel/Storage: Fix typos in HBA capabilities
2021-03-17 21:55:05 -03:00
(capabilities & (u32)(AHCI::HBACapabilities::SXS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::EMS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::CCCS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::PSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSC)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::PMD)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::FBSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SPM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SAM)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SCLO)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SAL)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SALP)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SMPS)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SSNTF)) != 0,
(capabilities & (u32)(AHCI::HBACapabilities::SNCQ)) != 0,
Kernel/Storage: Add AHCI Extended HBA Capabilities
2021-03-17 22:03:09 -03:00
(capabilities & (u32)(AHCI::HBACapabilities::S64A)) != 0,
Kernel/AHCI: Get BOH and NVMP from extended capabilities It was accidentally getting it from the regular capabilities.
2021-05-15 14:20:49 -03:00
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::BOH)) != 0,
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::NVMP)) != 0,
Kernel/Storage: Add AHCI Extended HBA Capabilities
2021-03-17 22:03:09 -03:00
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::APST)) != 0,
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::SDS)) != 0,
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::SADM)) != 0,
(extended_capabilities & (u32)(AHCI::HBACapabilitiesExtended::DESO)) != 0
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
};
}
Kernel/AHCI: Don't use UNMAP_AFTER_INIT in header files Instead, declare such methods and functions in the code itself.
2022-04-01 14:52:37 -03:00
UNMAP_AFTER_INIT NonnullOwnPtr<Memory::Region> AHCIController::default_hba_region() const
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
{
Everywhere: Add sv suffix to strings relying on StringView(char const*) Each of these strings would previously rely on StringView's char const* constructor overload, which would call __builtin_strlen on the string. Since we now have operator ""sv, we can replace these with much simpler versions. This opens the door to being able to remove StringView(char const*). No functional changes.
2022-07-11 14:32:29 -03:00
return MM.allocate_kernel_region(PhysicalAddress(PCI::get_BAR5(pci_address())).page_base(), Memory::page_round_up(sizeof(AHCI::HBA)).release_value_but_fixme_should_propagate_errors(), "AHCI HBA"sv, Memory::Region::Access::ReadWrite).release_value();
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
}
Kernel: Use default constructors/destructors https://isocpp.github.io/CppCoreGuidelines/CppCoreGuidelines#cother-other-default-operation-rules "The compiler is more likely to get the default semantics right and you cannot implement these functions better than the compiler."
2022-03-16 16:15:15 -03:00
AHCIController::~AHCIController() = default;
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
Kernel/AHCI: Don't use UNMAP_AFTER_INIT in header files Instead, declare such methods and functions in the code itself.
2022-04-01 14:52:37 -03:00
UNMAP_AFTER_INIT void AHCIController::initialize_hba(PCI::DeviceIdentifier const& pci_device_identifier)
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
{
Kernel/Storage: Add a whole bunch of AHCI debug output
2021-03-18 02:24:39 -03:00
u32 version = hba().control_regs.version;
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
hba().control_regs.ghc = 0x80000000; // Ensure that HBA knows we are AHCI aware.
PCI::enable_interrupt_line(pci_address());
PCI::enable_bus_mastering(pci_address());
enable_global_interrupts();
Kernel: Clean up the AHCI code a bit The AHCI code is not very good at OOM conditions, so this is a first step towards OOM correctness. We should not allocate things inside C++ constructors because we can't catch OOM failures, so most allocation code inside constructors is exported to a different function. Also, don't use a HashMap for holding RefPtr of AHCIPort objects in AHCIPortHandler because this structure is not very OOM-friendly. Instead use a fixed Array of 32 RefPtrs, as at most we can have 32 AHCI ports per AHCI controller.
2022-04-01 14:49:22 -03:00
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
auto implemented_ports = AHCI::MaskedBitField((u32 volatile&)(hba().control_regs.pi));
Kernel/Storage: Rename AHCIPortHandler => AHCIInterruptHandler This reflects better what this object is all about - handling interrupts of AHCI ports, and nothing more than that.
2022-04-01 17:48:46 -03:00
m_irq_handler = AHCIInterruptHandler::create(*this, pci_device_identifier.interrupt_line().value(), implemented_ports).release_value_but_fixme_should_propagate_errors();
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
2022-04-14 16:47:17 -03:00
reset();
dbgln_if(AHCI_DEBUG, "{}: AHCI Controller Version = {:#08x}", pci_address(), version);
dbgln("{}: AHCI command list entries count - {}", pci_address(), m_hba_capabilities.max_command_list_entries_count);
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
}
Kernel/Storage: Rename AHCIPortHandler => AHCIInterruptHandler This reflects better what this object is all about - handling interrupts of AHCI ports, and nothing more than that.
2022-04-01 17:48:46 -03:00
void AHCIController::handle_interrupt_for_port(Badge<AHCIInterruptHandler>, u32 port_index) const
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
{
auto port = m_ports[port_index];
VERIFY(port);
port->handle_interrupt();
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
}
void AHCIController::disable_global_interrupts() const
{
hba().control_regs.ghc = hba().control_regs.ghc & 0xfffffffd;
}
void AHCIController::enable_global_interrupts() const
{
hba().control_regs.ghc = hba().control_regs.ghc | (1 << 1);
}
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
2022-08-19 15:53:40 -03:00
LockRefPtr<StorageDevice> AHCIController::device_by_port(u32 port_index) const
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
{
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
2022-04-14 16:47:17 -03:00
SpinlockLocker locker(m_hba_control_lock);
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
auto port = m_ports[port_index];
if (!port)
return {};
Kernel/Storage: Do proper locking & reset in the AHCIController code The initialize_hba method now calls the reset method to reset the HBA and initialize each AHCIPort. Also, after full HBA reset we need to turn on the AHCI functionality of the HBA and global interrupts since they are cleared to 0 according to the specification in the GHC register.
2022-04-14 16:47:17 -03:00
SpinlockLocker port_hard_locker(port->m_hard_lock);
Kernel/Storage: Simplify AHCIPortHandler class The way AHCIPortHandler held AHCIPorts and even provided them with physical pages for the ATA identify buffer just felt wrong. To fix this, AHCIPortHandler is not a ref-counted object anymore. This solves the big part of the problem, because AHCIPorts can't hold a reference to this object anymore, only the AHCIController can do that. Then, most of the responsibilities are shifted to the AHCIController, making the AHCIPortHandler a handler of port interrupts only.
2022-04-01 17:45:07 -03:00
return port->connected_device();
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
}
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
2022-08-19 15:53:40 -03:00
LockRefPtr<StorageDevice> AHCIController::device(u32 index) const
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
{
Kernel: Make self-contained locking smart pointers their own classes Until now, our kernel has reimplemented a number of AK classes to provide automatic internal locking: - RefPtr - NonnullRefPtr - WeakPtr - Weakable This patch renames the Kernel classes so that they can coexist with the original AK classes: - RefPtr => LockRefPtr - NonnullRefPtr => NonnullLockRefPtr - WeakPtr => LockWeakPtr - Weakable => LockWeakable The goal here is to eventually get rid of the Lock* classes in favor of using external locking.
2022-08-19 15:53:40 -03:00
NonnullLockRefPtrVector<StorageDevice> connected_devices;
Kernel/AHCI: Dont assume ports start at 0 This fixes a bug that occurs when the controller's ports are not (internally) numbered sequentially. This is done by checking the bits set in PI. This bug was found on bare-metal, on a laptop with 1 Port that was reported as port 4.
2021-06-25 10:49:33 -03:00
u32 pi = hba().control_regs.pi;
AK+Everywhere: Replace __builtin bit functions In order to reduce our reliance on __builtin_{ffs, clz, ctz, popcount}, this commit removes all calls to these functions and replaces them with the equivalent functions in AK/BuiltinWrappers.h.
2021-12-19 18:46:55 -03:00
u32 bit = bit_scan_forward(pi);
Kernel/AHCI: Dont assume ports start at 0 This fixes a bug that occurs when the controller's ports are not (internally) numbered sequentially. This is done by checking the bits set in PI. This bug was found on bare-metal, on a laptop with 1 Port that was reported as port 4.
2021-06-25 10:49:33 -03:00
while (bit) {
dbgln_if(AHCI_DEBUG, "Checking implemented port {}, pi {:b}", bit - 1, pi);
pi &= ~(1u << (bit - 1));
auto checked_device = device_by_port(bit - 1);
AK+Everywhere: Replace __builtin bit functions In order to reduce our reliance on __builtin_{ffs, clz, ctz, popcount}, this commit removes all calls to these functions and replaces them with the equivalent functions in AK/BuiltinWrappers.h.
2021-12-19 18:46:55 -03:00
bit = bit_scan_forward(pi);
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
if (checked_device.is_null())
continue;
connected_devices.append(checked_device.release_nonnull());
}
Kernel/AHCI: Dont assume ports start at 0 This fixes a bug that occurs when the controller's ports are not (internally) numbered sequentially. This is done by checking the bits set in PI. This bug was found on bare-metal, on a laptop with 1 Port that was reported as port 4.
2021-06-25 10:49:33 -03:00
dbgln_if(AHCI_DEBUG, "Connected device count: {}, Index: {}", connected_devices.size(), index);
Kernel: Add basic AHCI functionality The hierarchy is AHCIController, AHCIPortHandler, AHCIPort and SATADiskDevice. Each AHCIController has at least one AHCIPortHandler. An AHCIPortHandler is an interrupt handler that takes care of enumeration of handled AHCI ports when an interrupt occurs. Each AHCIPort takes care of one SATADiskDevice, and later on we can add support for Port multiplier. When we implement support of Message signalled interrupts, we can spawn many AHCIPortHandlers, and allow each one of them to be responsible for a set of AHCIPorts.
2021-02-26 01:25:45 -03:00
if (index >= connected_devices.size())
return nullptr;
return connected_devices[index];
}
}
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